In recent years, liquid crystal display panels of an active matrix type using switching elements such as thin film transistors (TFTs) have been widely used in display units of devices displaying videos and images. In such display panels, a plurality of TFTs are insulated from each other using an insulating film formed on a substrate, and a data signal and a scan signal are supplied to such TFTs by using data signal lines and scan signal lines that are wired horizontally and vertically.
While the data signal lines and the scan signal lines are insulated from each other so as not to overlap each other by using the insulating film, in a case where the thickness of the insulating film is small, delay of the signals occurs due to parasitic capacitance formed at the intersections of these signal lines, which becomes one factor for the quality degradation of image display using the TFTs.
Thus, in Japanese Patent No. 4916461, an active matrix substrate in which the thickness of a first interlayer insulating film insulating signal wirings (data signal lines) and scan wirings (scan signal lines) from each other is configured to be larger than that of a gate insulating film insulating gate electrodes has been disclosed, and the first interlayer insulating film is described to be appropriately formed, for example, using a spin-on glass (SOG) material.